Company:Qualcomm India Private Limited Job Area:Engineering Group, Engineering Group Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of whats possible to enable next-generation experiences and drives digital transformation to help create
An experienced Digital Design Engineer is responsible for designing, developing, and optimizing digital logic circuits and systems for semiconductor, FPGA, or ASIC-based products. The role involves working across the full design cycle—from specification and RTL design to
General Information Job Title SoC Verification- Principal Engineer Job ID 18162 Country India City Noida Date Posted 09-Jul-2026 Job Category Engineering Job Subcategory SOC Engineering Hire Type Employee Remote Eligible No Descriptions & Requirements Job Description
Job Summary We are seeking a CAD Engineer specializing in Digital Verification to build, enhance, and support scalable verification infrastructure, methodologies, and EDA automation flows for ASIC/SoC development. The role focuses on enabling verification teams with robust
Company:Qualcomm India Private Limited Job Area:Engineering Group, Engineering Group Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of whats possible to enable next-generation experiences and drives digital transformation to help create
General Information Job Title Sr. Staff Project Engineering Manager (High Performance Computing Serdes PHY)- 16938 Job ID 16938 Country India City Noida Date Posted 09-Apr-2026 Job Category Engineering Job Subcategory Project Engineering Management Hire Type Employee
Job Description: Analog Validation/Characterization Engineer/Lead Primary and Secondary Responsibilities Develop bench characterization methodologies for Analog/Mixed-Signal IPs across PVT combinations. Perform Design Evaluation and Bench Characterization for Analog IPs on devices in development. Develop and write automated
Job ID 520656 Posted since 02-Sep-2026 Organization Digital Industries Field of work Research & Development Company SIEMENS EDA (INDIA) PRIVATE LIMITED Experience level Experienced Professional Job type Full-time Work mode Office/Site only Employment type Permanent Location(s)
Company:Qualcomm India Private Limited Job Area:Engineering Group, Engineering Group Hardware Engineering General Summary: Position: Staff Engineer Seeking highly experienced and motivated NoC Design lead to architect and drive the development of advanced Network-on-Chip solutions for next-generation
OUR STORY At STMicroelectronics, we believe in the power of technology to drive innovation and make a positive impact on people, businesses, and society. As a global semiconductor company, our advanced technologies and chips form the
About the job At Barco Immersive Experiences (IX), we combine a passion for technology with a spirit for creativity. Our technologies create unforgettable visual experiences in live events, museums, theme parks, simulation environments, and other high-impact
Company:Qualcomm India Private Limited Job Area:Engineering Group, Engineering Group ASICS Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of whats possible to enable next-generation experiences and drives communication and data processing transformation to
Job Summary We are looking for a skilled Physical Design Engineer to support end-to-end ASIC/SoC implementation from netlist/RTL to GDSII. The engineer will be responsible for physical implementation, timing closure, PPA optimization, physical verification, and sign-off while
Job Summary We are seeking an experienced and results-driven Sales Leader – VLSI to drive business growth and expand our presence in the semiconductor and VLSI industry. The ideal candidate will have extensive experience in technology
Location: Noida, Bangalore & Hyderabad Experience: 2-8 years Availability: Immediate Joiners Only Job Description We are seeking a strong Digital Physical Design Engineer to drive block-level physical implementation of complex SoCs/ASICs across advanced nodes. The role involves
This role is about owning the silicon journey from floorplan to signoff. 5– 25 years in physical design and SoC implementation Strong experience in Cadence tools: Innovus, Tempus, Voltus, Quantus Hands-on with floorplanning, PnR, STA, and