An experienced Digital Design Engineer is responsible for designing, developing, and optimizing digital logic circuits and systems for semiconductor, FPGA, or ASIC-based products. The role involves working across the full design cycle—from specification and RTL design
General Information Job Title Staff Application Engineer - Physical Implementation Job ID 18444 Country India City Noida Date Posted 21-Aug-2026 Job Category Engineering Job Subcategory Applications Engineering Hire Type Employee Remote Eligible No Descriptions & Requirements
Role Overview Design and Verify high-performance, low-power, high-reliability RISC‑V CPU cores for SoCs used in various edge products like automotive, IoT and mobile. Focus on microarchitecture, pipelining, and PPA (performance/power/area) optimization, with strong emphasis on functional safety
We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip
Alternate Job Titles: Staff Application Engineer – Physical Implementation Senior Implementation Solutions Engineer Staff Engineer – RTL-GDS Flow Customer Success Engineer – EDA Tools Technical Application Engineer – AI/ML Implementation We Are: Synopsys is the leader
General Information Job Title Staff Engineer - Analog Design Job ID 18437 Country India City Noida Date Posted 21-Aug-2026 Job Category Engineering Job Subcategory Analog Design Hire Type Employee Remote Eligible No Descriptions & Requirements Job
Job Overview: This opening is for a memory layout designer in our PHYSICAL IP – MEMORY group. We work on innovative memory architectures in pioneering technology nodes to enable the best Arm Systems in all the
General Information Job Title SOC Engineering- RTL Design- Principal Engineer Job ID 18085 Country India City Noida Date Posted 30-Jun-2026 Job Category Engineering Job Subcategory SOC Engineering Hire Type Employee Remote Eligible No Descriptions & Requirements
Company:Qualcomm India Private Limited Job Area:Engineering Group, Engineering Group Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of whats possible to enable next-generation experiences and drives digital transformation to help create
Company:Qualcomm India Private Limited Job Area:Engineering Group, Engineering Group Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of whats possible to enable next-generation experiences and drives digital transformation to help create
Company:Qualcomm India Private Limited Job Area:Engineering Group, Engineering Group Hardware Engineering General Summary: Drive the Physical Design lifecycle of chip development with a strong focus on Floorplanning, Placement, Clock Tree Synthesis (CTS), Routing, and Physical Signoff.
OUR STORY At STMicroelectronics, we believe in the power of technology to drive innovation and make a positive impact on people, businesses, and society. As a global semiconductor company, our advanced technologies and chips form the
Job Summary We are looking for a skilled Physical Design Engineer to support end-to-end ASIC/SoC implementation from netlist/RTL to GDSII. The engineer will be responsible for physical implementation, timing closure, PPA optimization, physical verification, and sign-off while
RTL Design Engineer (SDC Constraints) 𝗘𝘅𝗽𝗲𝗿𝗶𝗲𝗻𝗰𝗲: 𝟳+ 𝗬𝗲𝗮𝗿𝘀 𝗟𝗼𝗰𝗮𝘁𝗶𝗼𝗻: 𝗕𝗮𝗻𝗴𝗮𝗹𝗼𝗿𝗲 𝗪𝗼𝗿𝗸 𝗠𝗼𝗱𝗲: 𝗛𝘆𝗯𝗿𝗶𝗱 / 𝗥𝗲𝗺𝗼𝘁𝗲 𝗝𝗼𝗯 𝗢𝘃𝗲𝗿𝘃𝗶𝗲𝘄 We are looking for a highly skilled Senior RTL ASIC Design Engineer with strong hands-on experience in SDC Constraints.
Company Description Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering