Responsibilities & Key Deliverables JOB DESCRIPTION and RESPONSIBILITY:- 1. Provide support to various project teams for Business Case, Planning, Budgeting, and Project and Target costing. 2. Performance analysis, tracking and progress monitoring of different projects. 3.
Minimum qualifications: Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 4 years of experience in coding or scripting languages (e.g., Python, Tcl). 4 years of experience in
Company:Qualcomm India Private Limited Job Area:Engineering Group, Engineering Group Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of whats possible to enable next-generation experiences and drives digital transformation to help create
Company:Qualcomm India Private Limited Job Area:Engineering Group, Engineering Group Hardware Engineering General Summary: Minimum Qualifications: • Bachelors degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3-15 years of Hardware Engineering or related work
Company:Qualcomm India Private Limited Job Area:Engineering Group, Engineering Group Hardware Engineering General Summary: Minimum Qualifications:• Bachelors degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.
Responsibilities & Key Deliverables 1.Timely development to Rear Axle, Front Axle & its component etc. with desired quality level & ensure PPAP/PSW & Handover on time. 2.Technical signoff, Participation in Feasibility, GD&T study with design team
Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform
The Digital Physical Design Engineer is responsible for complete STA signoff for the SOC or Subsystem. The individual is responsible for writing timing constraints, interacting with the counterpart functions, such as Frontend, DFT and IP to write
Company Description Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today’s needs and tomorrow’s next big ideas. With a rich history of groundbreaking innovations in Flash and
Company Description Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today’s needs and tomorrow’s next big ideas. With a rich history of groundbreaking innovations in Flash and
Company:Qualcomm India Private Limited Job Area:Engineering Group, Engineering Group Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of whats possible to enable next-generation experiences and drives digital transformation to help create
Responsibilities: Timing constraints development and validation for functional and test modes Timing analysis and closure responsibilities at SoC level as well as block/subsystem level ECO generation and tracking to closure by collaborating with PD, Design, Constraint
Company:Qualcomm India Private Limited Job Area:Engineering Group, Engineering Group Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of whats possible to enable next-generation experiences and drives digital transformation to help create
Company:Qualcomm India Private Limited Job Area:Engineering Group, Engineering Group Hardware Engineering General Summary: STA Setup & Signoff: Perform STA setup, convergence, reviews, and signoff for multi-mode, multi-voltage domain designs for SoC & SubSystem · Timing Analysis & Debug:
Company:Qualcomm India Private Limited Job Area:Engineering Group, Engineering Group Hardware Engineering General Summary: · STA Setup & Signoff: Perform STA setup, convergence, reviews, and signoff for multi-mode, multi-voltage domain designs for SoC & SubSystem · Timing Analysis &
Company:Qualcomm India Private Limited Job Area:Engineering Group, Engineering Group Hardware Engineering General Summary: STA Setup & Signoff: Perform STA setup, convergence, reviews, and signoff for multi-mode, multi-voltage domain designs for SoC & SubSystem · Timing Analysis & Debug:
Responsibilities & Key Deliverables Own technical and quality readiness of battery parts and related sub‑assemblies Ensure process robustness, FTG and E‑PPAP readiness at suppliers Validate capacity, yield and quality for mature volume requirements Drive issue resolution
General Information Job Title SOC Engineering, Sr Staff Engineer (STA) Job ID 15330 Country India City Hyderabad Date Posted 19-Feb-2026 Job Category Engineering Job Subcategory SOC Engineering Hire Type Employee Remote Eligible No Descriptions & Requirements Job
Company Description Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today’s needs and tomorrow’s next big ideas. With a rich history of groundbreaking innovations in Flash and
Minimum qualifications: Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 3 years of experience in coding or scripting languages (e.g., Python, TCL). 3 years of experience in