Minimum qualifications: Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 4 years of experience with digital reasoning design principles, Register-Transfer Level (RTL) design concepts, and languages, such
Company Description Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering
We are looking to expand our team with a Senior Digital IC Design Engineer. You will help us develop IP for next generation Automotive, Industrial & Medical products. The successful candidate will participate in the design
The Role We are looking to expand our team with a Principal Digital IC Design Engineer. You will help us develop IP for next generation Automotive, Industrial & Medical products. The successful candidate will participate in
Overview Rambus, a premier chip and silicon IP provider making data faster and safer, is seeking to hire an exceptional Physical engineer to join our Physical Design team in Bangalore. In this role, you will be
Job Description As an “AI/ML driven ASIC Design and Implementation Automation Engineer”, you will work in a dynamic environment to explore methodology, flows and tools to improve efficiency and quality of results (power, performance, area, and
As an “AI/ML driven ASIC Design and Implementation Lead Engineer”, you will work in a dynamic environment to explore methodology, flows and tools to improve efficiency and quality of results (power, performance, area, and verification) for
General Information Job Title SOC Engineering, Sr Staff Engineer- RTL Design Job ID 18084 Country India City Noida Date Posted 30-Jun-2026 Job Category Engineering Job Subcategory SOC Engineering Hire Type Employee Remote Eligible No Descriptions &
General Information Job Title SOC Engineering, Staff Engineer - RTL Design Job ID 18083 Country India City Noida Date Posted 30-Jun-2026 Job Category Engineering Job Subcategory SOC Engineering Hire Type Employee Remote Eligible No Descriptions &
Who we are About Stripe Stripe is a financial infrastructure platform for businesses. Millions of companies—from the world’s largest enterprises to the most ambitious startups—use Stripe to accept payments, grow their revenue, and accelerate new business
Overview Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s “Intelligent Cloud” mission. SCHIE delivers the core infrastructure and foundational technologies for Microsofts over 200
Job Qualification: Experienced Static Timing Analysis (STA) Lead with 12+ years of experience doing STA for SoCs and Blocks. He/She should have experience of Multi mode timing constraint development, execution, and final timing signoff for advanced
Company:Qualcomm India Private Limited Job Area:Engineering Group, Engineering Group Hardware Engineering General Summary: Qualcomm Chennai is seeking a highly motivated Synthesis (Design Implementation) Engineer to drive synthesis and low-power implementation for complex SoC and subsystem designs.
Company:Qualcomm India Private Limited Job Area:Engineering Group, Engineering Group Hardware Engineering General Summary: As the Principal Engineer, RTL Synthesis Methodology Lead you will drive the technical direction and deployment of next-generation RTL-to-Gate implementation flows for Qualcomm’s
Company:Qualcomm India Private Limited Job Area:Engineering Group, Engineering Group Hardware Engineering General Summary: Role Overview The NPU Synthesis Lead will be responsible for driving synthesis and timing closure for Neural Processing Unit (NPU) IP and subsystems
Company:Qualcomm India Private Limited Job Area:Engineering Group, Engineering Group Hardware Engineering General Summary: Job Description Role Overview The NPU Synthesis Lead will be responsible for driving synthesis and timing closure for Neural Processing Unit (NPU) IP
Company:Qualcomm India Private Limited Job Area:Engineering Group, Engineering Group Hardware Engineering General Summary: Role Overview The NPU Synthesis Lead will be responsible for driving synthesis and timing closure for Neural Processing Unit (NPU) IP and subsystems
Company:Qualcomm India Private Limited Job Area:Engineering Group, Engineering Group Hardware Engineering General Summary: Role Overview The NPU Synthesis Lead will be responsible for driving synthesis and timing closure for Neural Processing Unit (NPU) IP and subsystems
Company:Qualcomm India Private Limited Job Area:Engineering Group, Engineering Group Hardware Engineering General Summary: Role Overview The NPU Synthesis Lead will be responsible for driving synthesis and timing closure for Neural Processing Unit (NPU) IP and subsystems
This role is for one of the Weekdays clients Min Experience: 4+ years Location: Bengaluru JobType: full-time Requirements Roles & Responsibilities • Perform block-level and full-chip Static Timing Analysis (STA). • Drive timing closure across all