Summary The Lead PERC Rule Developer will drive PERC methodology, rule development, and flow enablement for ESD, latch-up, power-domain, connectivity, and reliability-related verification. The role requires strong hands-on expertise in Calibre LVS/PERC, CMOS and FinFET fundamentals,
Role Summary: Looking for Lead Design Verification Engineers with 6+ years of experience who will be responsible for pre-silicon verification of IPs, subsystems, and SoC designs to ensure functional correctness and high-quality silicon delivery. Develop and
Summary: We are seeking a Lead Memory Design Engineer to join NXP’s NVM IP design group in Bangalore, India. This role involves leading and managing a diverse NVM IP portfolio, developing and maintaining automated IP management solutions,
At Capgemini Engineering, the world leader in engineering services, we bring together a global team of engineers, scientists, and architects to help the world’s mostinnovative companies unleash their potential. From autonomous cars to life-saving robots, our
At Capgemini Engineering, the world leader in engineering services, we bring together a global team of engineers, scientists, and architects to help the world’s mostinnovative companies unleash their potential. From autonomous cars to life-saving robots, our
Job Summary: We are seeking an experienced IO Circuit Design Engineer with 5-8 years of expertise in designing and validating high-performance I/O circuits for advanced semiconductor SoCs. The role involves developing GPIO, LVDS, DDR, SerDes support
Job descriptions may display in multiple languages based on your language selection. What we offer: At Magna, you can expect an engaging and dynamic environment where you can help to develop industry-leading automotive technologies. We invest
Performs staff support activities to develop, implement, and administer compensation and benefits policies and programs Participates in compensation surveys to collect and analyze salary information. Investigate market data and research to determine competitive positioning of the
Advanced Embedded Engr The candidate needs to have strong embedded platform technical skills, be able to communicate effectively (written and verbal), and work as team member in a global team. The candidate must have demonstrated skills/abilities
An experienced Digital Design Engineer is responsible for designing, developing, and optimizing digital logic circuits and systems for semiconductor, FPGA, or ASIC-based products. The role involves working across the full design cycle—from specification and RTL design
Role Overview Design and Verify high-performance, low-power, high-reliability RISC‑V CPU cores for SoCs used in various edge products like automotive, IoT and mobile. Focus on microarchitecture, pipelining, and PPA (performance/power/area) optimization, with strong emphasis on functional
Job Summary We are seeking a CAD Engineer specializing in Digital Verification to build, enhance, and support scalable verification infrastructure, methodologies, and EDA automation flows for ASIC/SoC development. The role focuses on enabling verification teams with
Aptiv -Help shape the future of mobility. Imagine a world with zero vehicle accidents, zero vehicle emissions, and wireless vehicle connectivity all around us. Every day, we move closer to making that world a reality. Aptiv’s
About Whirlpool India Whirlpool of India Limited, headquartered in Gurugram, is a leading home appliances company dedicated to enhancing life at home and inspiring generations through its trusted brands. The company operates three state-of-the-art manufacturing facilities
Engineering Manager - Edge AI & Robotics About Aptiv Aptiv is a global technology leader with more than 200,000 employees across 48 countries. We develop advanced software, compute platforms, and intelligent systems that enable autonomous driving,
Hardware Engineer -II Honeywell prides itself in excelling in a highly competitive market providing state of the art solution. The engineers in Honeywell constantly adapts and upgrades to latest and futuristic technology that keeps us ahead
General information Location: IN_Bangalore_Sattva Knowledge Court Bdg_HII Job Family: Engineering Worker Type Reference: Regular - Permanent Pay Rate Type: Salary Career Level: T3(A) Job ID: R-54384-2026 Apply Facebook LinkedIn X Email Description & Requirements Introduction: A
General information Location: IN_Bangalore_Sattva Knowledge Court Bdg_HII Job Family: Engineering Worker Type Reference: Regular - Permanent Pay Rate Type: Salary Career Level: T4(A) Job ID: R-54419-2026 Apply Facebook LinkedIn X Email Description & Requirements About the
Position Summary: We are expanding our Platform Engineering capability to build, secure, and automate the enterprise Data Platform on cloud and Databricks. In this role, youll help maintain and improve the underlying infrastructure, ingestion frameworks, CI/CD
Position Summary: We are expanding our Platform Engineering capability to build, secure, and automate the enterprise Data Platform on cloud and Databricks. This role owns the underlying infrastructure, ingestion frameworks, CI/CD pipelines, orchestration, and observability that