Your Role: -Own feasibility studies for defining the system architecture, requirements, and external interfaces; · Develop microarchitecture and logic design in collaboration with functional leads to deliver design from architecture to tape-out; · Perform RTL coding, Lint checks,
Job Title: RTL Design Engineers Exp Level: 4+ yrs Loctaion: Hyderabad /Bangalore Job Description: • RTL coding knowledge • Top-level (SOC) level basic industry standard Arch knowledge • SoC & IP level Integration knowledge • IPXACT knowledge • IORING
Key Responsibilities: Strong experience in CPU Core RTL Design: Single-thread / Multi-thread, In-order / Limited Out-of-Order pipelines Must have completed at least one full CPU core development cycle Experience in real-time/high-performance cores (e.g., ARM Cortex-R52 or equivalent)
Key Responsibilities: Develop and optimize logic design, register transfer level (RTL) coding, and simulation for the CPU. Participate in defining the architecture and microarchitecture features of the CPU design. Write RTL and optimize logic for power, performance, area, and
Below is the JD for RTL engineers. We need to build strong RTL team. Minimum 8+ years of work experience in ASIC RTL Design, Synthesis, STA & FV Experience in Logic design/micro-architecture/RTL coding is a must. Must have hands on experience
Senior RTL Design Engineer Location: Hyderabad Experience: 3–6 Years Role Overview We are looking for a Senior RTL Design Engineer with strong hands-on expertise in Ethernet-based SoC/IP design , RTL development, and design quality checks. Key Responsibilities Develop and
Among. The top 4 IT companies, in India ranked by market capitalization and revenue ASIC RTL Lead Bangalopre / Hyderabad / Kochi experience-11+ years Mandatory Skill : (RTL Design, RTL Coding & Integration, RTL quality checks (Lint, CDC), IP, targeted for
Job Description Meet the Team We are part of the Common Hardware Group, with our team specializing in FPGA development. Our work spans both sophisticated data-path and challenging control-path FPGAs. The design process includes crafting the
ASIC Design Engineer We are seeking a skilled ASIC Design Engineer with a solid background in digital design , RTL coding , and ASIC development . The ideal candidate will have extensive experience in designing, developing, and optimizing
Lead Design Engineer As an RTL Design Lead , you will play a critical role in leading the RTL design and verification process for complex digital designs . You will manage a team of RTL engineers , collaborate with