NXPs MCU/MPU Engineering (MME) team is a central engineering organization responsible for developing and delivering Systems-on-a-Chip (SoCs) for NXPs Automotive, Secure Edge, Advanced Analog and Radar Processing business lines. MMEs. The team is challenged to produce
About Texas Instruments Texas Instruments (TI) is a global semiconductor company designing, manufacturing, and selling analog and embedded processing chips — powering everything from industrial automation to automotive safety systems worldwide. About the Team — High
Senior DFT Engineer – Automation & Scripting Experience: 3 to 5 Years Location: Bangalore Job Description: We are seeking a DFT Engineer with strong expertise in automation and scripting to support and enhance DFT flows across IP and SoC
Principal Digital DFT Engineer Role Summary The Principal Digital DFT Engineer is responsible for architecting, implementing, and verifying advanced DFT solutions for complex digital ASICs and SoCs. This position emphasizes direct technical execution, deep problem-solving, and ownership of DFT flows
Company:Qualcomm India Private Limited Job Area:Engineering Group, Engineering Group Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of whats possible to enable next-generation experiences and drives digital transformation to help create
Company:Qualcomm India Private Limited Job Area:Engineering Group, Engineering Group Hardware Engineering General Summary: Role Overview The NPU Synthesis Lead will be responsible for driving synthesis and timing closure for Neural Processing Unit (NPU) IP and subsystems
Grow with us Join Ericsson’s cutting-edge journey to shape the future of 5G networks! As an Physical Synthesis Engineer, you’ll work on pioneering digital ASIC designs vital to Ericsson’s mobile network infrastructure. Our team, responsible for
Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring
Company Description Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today’s needs and tomorrow’s next big ideas. With a rich history of groundbreaking innovations in Flash and
Company:Qualcomm India Private Limited Job Area:Engineering Group, Engineering Group Hardware Engineering General Summary: Job Description Role Overview The NPU Synthesis Lead will be responsible for driving synthesis and timing closure for Neural Processing Unit (NPU) IP
Company:Qualcomm India Private Limited Job Area:Engineering Group, Engineering Group Hardware Engineering General Summary: Role Overview The NPU Synthesis Lead will be responsible for driving synthesis and timing closure for Neural Processing Unit (NPU) IP and subsystems
Company:Qualcomm India Private Limited Job Area:Engineering Group, Engineering Group Hardware Engineering General Summary: Role Overview The NPU Synthesis Lead will be responsible for driving synthesis and timing closure for Neural Processing Unit (NPU) IP and subsystems
Grow with us About this Opportunity Join Ericssons cutting-edge journey to shape the future of 5G networks! As a Low-Power Physical Design Engineer, youll work on pioneering digital ASIC designs vital to Ericssons mobile network infrastructure.
Grow with us About this Opportunity Join Ericsson’s cutting-edge journey to shape the future of 5G networks! As a Static Timing Analysis Engineer, you’ll work on pioneering digital ASIC designs vital to Ericsson’s mobile network infrastructure.
Job Summary NXP Semiconductors is seeking a Physical Design Engineer (G2) with strong fundamentals in digital implementation to join our growing VLSI team. In this role, you will contribute to the implementation and signoff of complex
Grow with us About this Opportunity Join Ericssons cutting-edge journey to shape the future of 5G networks! As a Physical Design Engineer, youll work on pioneering digital ASIC designs vital to Ericssons mobile network infrastructure. Our
Grow with us Join Ericsson’s cutting-edge journey to shape the future of 5G networks! As an Physical Synthesis Engineer, you’ll work on pioneering digital ASIC designs vital to Ericsson’s mobile network infrastructure. Our team, responsible for
Job description (Staff/Senior Staff Engineer) Backend Integration Engineer Working experience on 7nm and below Technologies. Proficient in Physical Synthesis flow and PPA optimizations with emphasis on Timing and Low Power design. Proficient in Equivalence Checks, Low
Static Timing Analysis (STA) Lead Join the India team of most cutting-edge and well-funded storage startup in Silicon Valley as the Lead STA Engineer working on timing closure of complex high performance ASIC in latest technology
HI All, I have immediate job opening for Physical design Engineers for Noida & BLR Location. Exp - 5 to 10 yrs Location - Noida & BLR Notice Period - Immediate to 15 days ( Max).