RTL Design Verification Engineer Experience- 3+ years Location-Bangalore NP- 0- 15 days Key Responsibilities Functional Verification Develop and execute RTL verification plans based on design specifications and system requirements. Build, enhance, and maintain System Verilog /
Role and Responsibilities : Analog Layout Design and develop critical analog, mixed-signal, and custom digital blocks. Perform comprehensive layout verification, including LVS, DRC, Antenna, PEX, Voltus, EMIR, and ensure quality checks and documentation support. Deliver block-level
Job Description Physical Design Engineer Location-Hyderabad Exp- 4 to 8 Yrs Requirements • 4-8 years of hands-on physical design implementation experience along with APR flow development and PPA analysis • STA closure at block • Experience
SRAM Layout Engineer Experience:- 5-15 years Qualifications:- B.Tech/B.E/M.Tech/M.E Location:-Bangalore Role and Responsibilities:- Experienced SRAM layout profiles who can work and design SRAM leafcells, Compiler level LVS/DRC independently. Skill Requirements:- SRAM layout compiler development. Good to have:-
Role and Responsibilities: Develops and prepares stdcells layouts and detailed drawings of the semiconductor devices from schematics and related geometry provided by design engineering. Work may be completed through use of CAD or other computerized equipment.
Job Description: Standard Cell Layout Engineer Location: Hyderabad Experience: 3–5 Years Notice Period: Immediate to 15 days We are looking for experienced Standard Cell Layout Engineers to support library development projects at our Hyderabad location. The
We are seeking a highly skilled WLAN Developer with strong expertise in wireless networking protocols, driver development, and debugging. The ideal candidate will have hands-on experience in WLAN driver development on Linux platforms, with a solid
We are looking for a talented and results-driven Embedded software service Sales Leader to join our team. The Sales Leader will be responsible for driving sales and revenue growth by identifying new business opportunities, cultivating relationships
Responsibility: Responsible for Design and development of critical analog, mixed-signal, custom digital block, and full chip level integration support. • Expertise in Cadence VLE/VXL and Mentor Graphic Caliber DRC/LVS is a must. • Perform layout verification