Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking,
About SiFive As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive applications in the world.
Locations: Bangalore, India Categories: Engineering Req ID: 91609 ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to
Job Description Your Role Lead architecture, integration, and verification strategy for high-speed connectivity IPs and chiplet interconnect solutions. Define PCIe/CXL/ UCIe subsystem architecture. Drive protocol compliance strategy. Review integration architecture and performance requirements. Lead interoperability and
Locations: Bangalore, India Categories: Engineering Req ID: 92150 ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to
About TYLsemi, Inc. The Opportunity The AI infrastructure market is exploding. Every hyperscaler, every cloud provider, every AI company is building custom silicon. But they all face the same problem: how do you connect hundreds of
What to Expect The Tesla AI Hardware team is at the forefront of revolutionizing artificial intelligence through cutting-edge hardware innovation. Comprising brilliant engineers and visionaries, the team designs and develops advanced AI inference chips tailored to
Company:Qualcomm India Private Limited Job Area:Engineering Group, Engineering Group Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of whats possible to enable next-generation experiences and drives digital transformation to help create
Minimum qualifications: Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 8 years of experience in Application-Specific Integrated Circuit/System on a chip (ASIC/SoC) development with Verilog/SystemVerilog. Experience in
About TYLsemi, Inc. The Opportunity The AI infrastructure market is exploding. Every hyperscaler, every cloud provider, every AI company is building custom silicon. But they all face the same problem: how do you connect hundreds of
About Client: Our Client is a signal processing infrastructure company. they build the full acquisition and compute stack for human-aware technology — from custom analog front-end IP that captures biosignals at the source, to signal-first compute
CPU RTL Design Engineer Location: Bengaluru Experience: 5–10 Years Role Overview: We are looking for a CPU RTL Design Engineer with strong expertise in CPU microarchitecture, computer architecture, and RTL development for next-generation ARM and RISC-V processors. The ideal
Key Responsibilities: Strong experience in CPU Core RTL Design: Single-thread / Multi-thread, In-order / Limited Out-of-Order pipelines Must have completed at least one full CPU core development cycle Experience in real-time/high-performance cores (e.g., ARM Cortex-R52 or equivalent)
LLTS is looking to hire for RTL design engineers with 6+ years of experience with below skills set :: RTL Design Engineer with 6+ of Hands on experiences. • Experience/proficiency in RTL design(Verilog/VHDL) architecture implementation using (coding in) hardware
Below is the JD for RTL engineers. We need to build strong RTL team. Minimum 8+ years of work experience in ASIC RTL Design, Synthesis, STA & FV Experience in Logic design/micro-architecture/RTL coding is a must. Must have hands on
We are seeking an experienced ASIC Design Engineer with deep expertise in high-speed interface protocols to join our silicon engineering team. The ideal candidate will have a strong background in digital design, micro-architecture, and implementation of
RTL Design Engineer | 5-12 Years We are seeking an RTL Design Engineer with 5-12 years of ASIC/SoC design experience to drive the development of high-performance digital designs from architecture to implementation. Key Requirements: Strong experience in RTL design
DFT RTL/Implementation: Must have very good understanding of all standard dfx requirements and implementation methods. Must have worked on constraints, timing closure support, verification closure support, VnC debug support, etc. Experience with Tessent is a plus. Must
SOC RTL Design Verification Experience: 4 to 10 Years Location: Bangalore Key Responsibilities: • Verification of SOC RTL (This is a DV Req) : FW-HW co-verification at SOC level, good understanding of SOC boot flow, integration level verification
Job Description / Responsibilities Drive end‑to‑end program delivery, including planning, execution, tracking, and reporting. Identify, monitor, and mitigate risks, dependencies, and issues throughout the program lifecycle. Align program execution with customer‑specific processes, quality expectations, and engagement