Senior Digital Design Engineer focusing on the digital datapath of high-performance analog-to-digital and digital-to-analog converters. Job responsibilities include RTL design, verification, behavioral modelling, support and assist with synthesis, timing closure and P&R flow for the digital controller
Digital Design Engineer focusing on high-performance analog-to-digital and digital-to-analog converters. Job responsibilities include RTL design, verification, behavioral modelling, support and assist with synthesis, timing closure and P&R flow for the digital controller for high performance data converters
Company:Qualcomm India Private Limited Job Area:Engineering Group, Engineering Group Hardware Engineering General Summary: Minimum 4 to 8 years of work experience in ASIC RTL Design Experience in Logic design/micro-architecture/RTL coding is a must. Must have hands on experience with
Company:Qualcomm India Private Limited Job Area:Engineering Group, Engineering Group Hardware Engineering General Summary: BDC WRD (Wi-Fi) is responsible for developing Qualcomm’s Wi-Fi chips. We are looking for a digital design engineer, with some signal processing background.
Company:Qualcomm India Private Limited Job Area:Engineering Group, Engineering Group Hardware Engineering General Summary: Wireless HW Design Engineer (ASIC) – Lead Engineer, Senior BDC WRD (Wi-Fi) is responsible for developing Qualcomm’s Wi-Fi chips. We are looking for
Company:Qualcomm India Private Limited Job Area:Engineering Group, Engineering Group Hardware Engineering General Summary: Roles and Responsibilities Qualcomm modem team is looking for world-class RTL design engineers looking to work on cutting edge wireless technology, which will be
Company:Qualcomm India Private Limited Job Area:Engineering Group, Engineering Group Hardware Engineering General Summary: In this role You will be interacting closely with the product definition and architecture team. Developing implementation (microarchitecture and coding) strategies to meet quality,
Company:Qualcomm India Private Limited Job Area:Engineering Group, Engineering Group Hardware Engineering General Summary: NoC design lead and is part of BDC infrastructure (NoC/Interconnect) core team Responsible for specification, design and implementation of interconnect and related IP’s
Company:Qualcomm India Private Limited Job Area:Engineering Group, Engineering Group Hardware Engineering General Summary: Job Description - 5+ year RTL designer We are looking for a highly motivated RTL Design Engineer with 5+ years of experience in front-end ASIC/SoC
Company:Qualcomm India Private Limited Job Area:Engineering Group, Engineering Group Hardware Engineering General Summary: Role : The role requires design experience of more than 10 years working on RTL Design and Debug. The position is that of a
Company:Qualcomm India Private Limited Job Area:Engineering Group, Engineering Group Hardware Engineering General Summary: The Director-SoC Lead role is a structural requirement as we chart our path for our next-generation switch and IO chiplet programs that address
Company:Qualcomm India Private Limited Job Area:Engineering Group, Engineering Group Hardware Engineering General Summary: Job Description This role offers a position in system power management IP cores and subsystem design, targeted for variety of industry leading Snapdragon
Company:Qualcomm India Private Limited Job Area:Engineering Group, Engineering Group Hardware Engineering General Summary: Qualcomms Hexagon NPU Team is hiring for the various positions in Bangalore (India) location for the development of high-performance, energy-efficient CPU and AI
Key Responsibilities: Develop and optimize logic design, register transfer level (RTL) coding, and simulation for the CPU. Participate in defining the architecture and microarchitecture features of the CPU design. Write RTL and optimize logic for power, performance, area, and
Your Role: -Own feasibility studies for defining the system architecture, requirements, and external interfaces; · Develop microarchitecture and logic design in collaboration with functional leads to deliver design from architecture to tape-out; · Perform RTL coding, Lint checks,
Below is the JD for RTL engineers. We need to build strong RTL team. Minimum 8+ years of work experience in ASIC RTL Design, Synthesis, STA & FV Experience in Logic design/micro-architecture/RTL coding is a must. Must have hands on experience
Key Responsibilities: Strong experience in CPU Core RTL Design: Single-thread / Multi-thread, In-order / Limited Out-of-Order pipelines Must have completed at least one full CPU core development cycle Experience in real-time/high-performance cores (e.g., ARM Cortex-R52 or equivalent)
LLTS is looking to hire for RTL design engineers with 6+ years of experience with below skills set :: RTL Design Engineer with 6+ of Hands on experiences. • Experience/proficiency in RTL design(Verilog/VHDL) architecture implementation using (coding in) hardware description
RTL Design Engineer | 5-10 Years Experience Job Summary We are looking for a skilled RTL Design Engineer with 5-10 years of experience in ASIC/SoC development. The ideal candidate will be responsible for designing, coding, and validating complex digital
Among. The top 4 IT companies, in India ranked by market capitalization and revenue ASIC RTL Lead Bangalopre / Hyderabad / Kochi Mandatory Skill : (RTL Design, RTL Coding & Integration, RTL quality checks (Lint, CDC), IP, targeted for SOC, Static