Job Details: Job Description: We are looking for a Senior FIP Enablement and Support Engineer to join the Intel Foundry / DTP Customer Engineering team. The successful candidate brings deep expertise in Foundational IP (Standard Cell Libraries,
General Information Job Title Principal ASIC Digital Verification Engineer- IP Development Job ID 13119 Country India City Bengaluru Date Posted 29-Oct-2025 Job Category Engineering Job Subcategory ASIC Digital Design Hire Type Employee Remote Eligible No Descriptions &
Job Details: Job Description: The Memory PHY Group (MPG) within the Central Engineering Group (CEG) is looking for a Pre-Silicon Verification Engineer to deliver latest and best-in-class DDR PHY IP for SoCs across Intel for the latest
General Information Job Title IP Design Technical Lead/ Staff ASIC RTL Design Engineer Job ID 16586 Country India City Bengaluru Date Posted 24-Mar-2026 Job Category Engineering Job Subcategory ASIC Digital Design Hire Type Employee Remote Eligible No
General Information Job Title Principal RTL Design Engineer, Interconnect IP (PCIe digital design and architecture) Job ID 16923 Country India City Bengaluru Date Posted 09-Apr-2026 Job Category Engineering Job Subcategory ASIC Digital Design Hire Type Employee Remote
Job Details: Job Description: The Memory PHY Group (MPG) within the Central Engineering Group (CEG) is looking for a Pre-Silicon Verification Engineer to deliver latest and best-in-class DDR PHY IP for SoCs across Intel for the latest
Job ID 514588 Posted since 20-Jul-2026 Organization Legal, Compliance and Intellectual Property Field of work Research & Development Company Siemens Technology and Services Private Limited Experience level Early Professional Job type Full-time Work mode Office/Site only
Minimum qualifications: Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 4 years of experience with digital reasoning design principles, Register-Transfer Level (RTL) design concepts, and languages, such
Job Opportunity: Seeking highly motivated, energetic, team-oriented person driving roadmaps for IP / Subsystem domain including complete IP portfolio, going deeper into logic design and architecting and developing Complex IPs / Subsystems solutions. Working closely with experienced and motivated
Job Details: Job Description: The Hard IP and Test Chip Development team, within Intels Central Engineering Group, is responsible for delivering industrydefining analog and mixedsignal IP for Intels Client, Datacenter, AI and Foundry customers. The IO team owns
Job Details: Job Description: The Role and Impact: As an IP Logic Design Engineer, you will play a pivotal role in developing high-quality intellectual property (IP) for Unified Intel Chassis designs. This position is at the forefront of
Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform
Minimum qualifications: Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 8 years of experience with digital logic design principles, RTL design concepts, and languages, such as Verilog
Company:Qualcomm India Private Limited Job Area:Engineering Group, Engineering Group Hardware Engineering General Summary: NoC design lead and is part of BDC infrastructure (NoC/Interconnect) core team Responsible for specification, design and implementation of interconnect and related IP’s Actively
Company:Qualcomm India Private Limited Job Area:Engineering Group, Engineering Group Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of whats possible to enable next-generation experiences and drives digital transformation to help create
Company:Qualcomm India Private Limited Job Area:Engineering Group, Engineering Group Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of whats possible to enable next-generation experiences and drives digital transformation to help create
Company:Qualcomm India Private Limited Job Area:Engineering Group, Engineering Group Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of whats possible to enable next-generation experiences and drives digital transformation to help create
Company:Qualcomm India Private Limited Job Area:Engineering Group, Engineering Group Systems Engineering General Summary: Infra Systems Architect for the next generation System-on-chip (SoC) for smartphones, Compute, AI accelerators and other product categories. This position will be responsible
Company:Qualcomm India Private Limited Job Area:Engineering Group, Engineering Group Hardware Engineering General Summary: Job Description: As a leading technology innovator, Qualcomm pushes the boundaries of whats possible to enable next-generation experiences and drives digital transformation to
Company:Qualcomm India Private Limited Job Area:Engineering Group, Engineering Group Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of whats possible to enable next-generation experiences and drives digital transformation to help create