Experience: 4-10 years Location - Bangalore/Pune Responsibilities: · Complete DFT ownership of projects including: Test architecture definition. Identifying and implementing RTL changes for DFT. Performing scan insertion, LEC checks, low power CLP checks. Developing timing constraints for test
Job Opportunity: Seeking highly motivated, energetic, team-oriented person driving roadmaps for IP / Subsystem domain including complete IP portfolio, going deeper into logic design and architecting and developing Complex IPs / Subsystems solutions. Working closely with
As an “AI/ML driven ASIC Design and Implementation Lead Engineer”, you will work in a dynamic environment to explore methodology, flows and tools to improve efficiency and quality of results (power, performance, area, and verification) for SoC
Meet the Team The Common Hardware Group (CHG) delivers the silicon, optics, and hardware platforms for Ciscos core Switching, Routing, and Wireless products. With ~2,100 employees across 16 countries, we design the networking hardware for Enterprises
About Analog Devices Analog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and software technologies into
About TYLsemi, Inc. The Opportunity The AI infrastructure market is exploding. Every hyperscaler, every cloud provider, every AI company is building custom silicon. But they all face the same problem: how do you connect hundreds of
Minimum qualifications: Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 10 years of experience with advanced design, including clock/voltage domain crossing, Design for Testing (DFT), and low power
Company Description Axiado is building the future of AI powered digital infrastructure. We are a fast-growing, well funded silicon, systems, and solutions company pioneering a new category of semiconductor called the Trusted Control/Compute Unit (TCU) that
Join the proactive Chip Methodology & Automation (CMA) team within Arms Solutions Engineering organization! As a CAD-DFT Engineer, you will develop and apply scalable strategies, sequences, and automation to optimize Arm-based SoC implementation. This role gives you
Company Description Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering
Meet the Team Join the Cisco Silicon One team and drive innovation at the heart of next-generation network devices—Cisco Silicon One. Our unique team operates in a startup-like environment within a world-class corporation, pushing the boundaries
Minimum qualifications: Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 15 years of experience with chip design flow, chip architecture, design methodologies, physical design, and verification processes.
Company Description Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering
Silicon Labs (NASDAQ: SLAB) is the leading innovator in low-power wireless connectivity, building embedded technology that connects devices and improves lives. Merging cutting-edge technology into the world’s most highly integrated SoCs, Silicon Labs provides device makers
Job Description It’s not just about your career or job title… It’s about who you are and the impact you will make on the world. Because whether it’s for each other or our customers, we put
Job Description It’s not just about your career or job title… It’s about who you are and the impact you will make on the world. Because whether it’s for each other or our customers, we put
Minimum qualifications: Bachelors degree in Electrical, Computer Engineering or equivalent practical experience. 10 years of experience in SoC DFT architecture and design. 10 years of experience in DFT protocols including Scan Compression, MBIST, LBIST, JTAG (IEEE 1149.1), and
Change the world. Love your job. This is a unique opportunity to be part of a team that drives testing of highly integrated multi-rail power management devices going into markets with significant growth potential. The ideal
General Information Job Title Staff R&D Software Engineer - DFT Job ID 18371 Country India City Noida Date Posted 12-Aug-2026 Job Category Engineering Job Subcategory R&D Engineering Hire Type Employee Remote Eligible No Descriptions & Requirements Job
The position involves designing, developing and deploying UVM based Testbenches for multi-core, multi-threaded processor subsystems with emphasis on verifying and signing off performance and power along with functionality for mixed signal SOC. The candidate should have