- Design Engineer
- Engineer
- Asic Design Engineer
- Design Verification Engineer
- Physical Design Engineer
- Principal Engineer
- Senior Design Verification Engineer
- Senior Physical Design Engineer
- Senior Engineer
- Asic Verification Engineer
- Lead Manager
- Digital Design Engineer
- Senior Staff
- Lead Engineer
- Product Engineer
Minimum qualifications: Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 4 years of experience with digital logic design principles, RTL design concepts, and languages, such as Verilog or SystemVerilog. Experience
Position: ASIC RTL Design Engineer Experience: 8+ Years Location: Noida Share resume on [email protected] Key Responsibilities Develop synthesizable RTL from micro-architecture specifications. Design digital blocks such as control logic, datapath, and bus interfaces (AXI/AHB/APB). Debug and validate RTL using simulation and waveform analysis.
Company:Qualcomm India Private Limited Job Area:Engineering Group, Engineering Group Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of whats possible to enable next-generation experiences and drives digital transformation to help create
Minimum qualifications: Bachelors degree in electrical engineering, computer engineering, computer science, a related field, or equivalent practical experience. 4 years of experience with System Verilog and UVM Preferred qualifications: Masters degree or PhD in electrical engineering,
NVIDIA is seeking passionate, highly motivated, and creative senior design engineers to be part of its Graphics team working on the design of state of the art memory subsystem components used in their industry-leading Graphics Processors. This position offers
Minimum qualifications: Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 8 years of experience with digital logic design principles, RTL design concepts, and languages, such as Verilog or SystemVerilog. 8
NVIDIA has continuously reinvented itself. Our invention of the GPU sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. Today, research in artificial intelligence is booming worldwide, which calls
Minimum qualifications: Bachelors degree in Building Engineering, Electrical and Electronics Engineering, Controls, IT, or equivalent practical experience. 4 years of experience in DFT/DFD flows and methodologies. Experience with Scan insertion, Automatic Test Pattern Generation (ATPG), Gate
Minimum qualifications: Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience. 4 years of experience in ASIC development with Verilog, SystemVerilog, Very High Speed Integrated Circuit (VHSIC), Hardware Description Language,
Company Description Axiado is building the future of AI powered digital infrastructure. We are a fast-growing, well funded silicon, systems, and solutions company pioneering a new category of semiconductor called the Trusted Control/Compute Unit (TCU) that
Company Description Axiado is building the future of AI powered digital infrastructure. We are a fast-growing, well funded silicon, systems, and solutions company pioneering a new category of semiconductor called the Trusted Control/Compute Unit (TCU) that
Company Description Axiado is building the future of AI powered digital infrastructure. We are a fast-growing, well funded silicon, systems, and solutions company pioneering a new category of semiconductor called the Trusted Control/Compute Unit (TCU) that
Senior Digital Design Engineer focusing on the digital datapath of high-performance analog-to-digital and digital-to-analog converters. Job responsibilities include RTL design, verification, behavioral modelling, support and assist with synthesis, timing closure and P&R flow for the digital controller for high performance
Digital Design Engineer focusing on high-performance analog-to-digital and digital-to-analog converters. Job responsibilities include RTL design, verification, behavioral modelling, support and assist with synthesis, timing closure and P&R flow for the digital controller for high performance data converters in cutting edge
Responsibilities MaxLinear is seeking a Principal ASIC Design Engineer to join our Digital ASIC Design group. The Digital ASIC team delivers innovative and scalable ASIC solutions addressing complex challenges in the optical and wireless communications domain. In this senior technical role, you will
Responsibilities MaxLinear is seeking a Principal ASIC Design Engineer to join our Digital ASIC Design group. The Digital ASIC team delivers innovative and scalable ASIC solutions addressing complex challenges in the optical and wireless communications domain. In this senior technical role, you will
Job Details: Job Description: Central Engineering Group is pioneering innovation with unique Custom ASIC Design Division offering end-to-end customizable silicon solutions for our customers in the client, server, AI and Automotive space. Joining as an SoC Logic Design Engineer, you
Company Description Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today’s needs and tomorrow’s next big ideas. With a rich history of groundbreaking innovations in Flash and
Position SummaryAbout Samsung Semiconductor India Research (SSIR) With a wide range of industry-leading semiconductor solutions, we are enabling innovative growth in market segments in component solutions, featuring industry-leading technologies in System LSI, Memory and Foundry. Our
Minimum qualifications: Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 4 years of experience with digital logic design principles, RTL design concepts, and languages, such as Verilog or SystemVerilog. Experience