About the Role: Grade Level (for internal use):12 The Team: The Enterprise Solutions Technology division includes workflow solutions across Lending, Reg & Compliance, Global Markets and Software business. Enterprise Solutions provides industry-leading set of integrated tools,
Job Description SummaryJoin a global leader in energy transmission and help shape the future of power. We are looking for a Senior Project Engineering Manager to lead the engineering execution of large-scale EPC projects. You will oversee a
Job Description SummaryThe candidate should possess strong hands-on experience in power system studies, STATCOM equipment sizing, insulation coordination, harmonics analysis, and transient simulations using industry-standard engineering software tools. The role requires technical leadership, project coordination, customer interaction
About the Role: Grade Level (for internal use):12 About the Role: We are looking for a Senior Full Stack Software Engineer who thrives on building high-performance, scalable, and AI-augmented enterprise applications. This role demands strong backend
About the Role: Grade Level (for internal use):11 Overview The Team We are an established development team, looking to grow, innovation and push the boundaries of whats possible in software development. We prioritize providing an excellent
Functional Safety Architect : Business Line Description: · NXPs CTO Functional Safety Competence Centre (FuSa CC) is a central engineering organization responsible for safety architecture and management for NXPs Automotive, Edge, Audio , Analog and Radar Processing
General Information Job Title Staff Engineer - Analog Design Job ID 18437 Country India City Noida Date Posted 21-Aug-2026 Job Category Engineering Job Subcategory Analog Design Hire Type Employee Remote Eligible No Descriptions & Requirements Job Description
Role Purpose The Physical IP Division in Arm Noida creates Memory IPs which are extensively used by thousands of SoC designers around the world to design leading edge chips. We are currently developing memory fast cache
Job Description SummaryThe Lead Engineer – Instrumentation & Controls is responsible for the engineering, design, and execution support of instrumentation and control systems for Steam Power projects (Boiler, Steam Turbine, Generator, ESP, FGD). The role involves development
Job Description: Analog Validation/Characterization Engineer/Lead Primary and Secondary Responsibilities Develop bench characterization methodologies for Analog/Mixed-Signal IPs across PVT combinations. Perform Design Evaluation and Bench Characterization for Analog IPs on devices in development. Develop and write automated
Job Description SummaryThe candidate should possess strong hands-on experience in Prepare and review MV Equipment Technical Specifications, Datasheets, and Purchase Requisitions, vendor offer evaluation, technical bid analysis, Layout & Section Drawings, Equipment Sizing, Switchyard Electrical Equipment
Job Description SummaryAs a Lead Control Automation System Engineer, you will be responsible to lead the requirement, design, implementation, and development of digital control system of the HVDC Control & Protection system. As part of this
Company Description Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering
Job ID 520656 Posted since 02-Sep-2026 Organization Digital Industries Field of work Research & Development Company SIEMENS EDA (INDIA) PRIVATE LIMITED Experience level Experienced Professional Job type Full-time Work mode Office/Site only Employment type Permanent Location(s)
Job Overview: The Physical IP Division in Arm develops Memory IPs which are extensively used by thousands of SoC designers around the world to build groundbreaking chips. We are currently developing memory fast cache instances on
Job Overview: The Physical IP Division in Arm creates Memory IPs which are extensively used by thousands of SoC designers around the world to design groundbreaking chips. We are currently developing memory fast cache instances on
Job Overview: The Physical IP Division in Arm creates Memory IPs which are extensively used by thousands of SoC designers around the world to design groundbreaking chips. We are currently developing memory fast cache instances on
Work ScheduleOther Environmental ConditionsAdherence to all Good Manufacturing Practices (GMP) Safety Standards, Office, Some degree of PPE (Personal Protective Equipment) required (safety glasses, gowning, gloves, lab coat, ear plugs etc.), Various outside weather conditions Job Description
OUR STORY At STMicroelectronics, we believe in the power of technology to drive innovation and make a positive impact on people, businesses, and society. As a global semiconductor company, our advanced technologies and chips form the
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Job Title: Lead Product Engineer Grade: T3 Experience: 4-7 Years Location: Noida Cadence is a pivotal