We’re looking for someone with strong hands-on experience in ATPG, scan, and DFT flows, with the ability to independently handle DFT tasks and debug complex issues. Must Have: 3+ years of SoC/ASIC Digital Design with DFT experience Strong hands-on
Valeo is a tech global company, designing breakthrough solutions to reinvent the mobility. We are an automotive supplier partner to automakers and new mobility actors worldwide. Our vision? Invent a greener and more secured mobility, thanks
Diploma / Bachelor Degree Electronics with2+ years of design experience in PCB design is must. PCB design expertise, using schematic as Concept HDL and Allegro 16.6 or 17.2, Altium Ability to design PCBs from schematic to
Job Title: Lead Physical Design (PnR) Engineer Location: Chennai Experience: 8+ Years Job Description: We are looking for an experienced Lead PnR Engineer with strong expertise in physical design implementation and hands-on experience with Cadence tools.
Senior Staff DFT Engineer Location: Bangalore Description We are a reimagining high-performance computing. Our accelerated compute solutions leverage intelligent adaptive algorithms to vastly accelerate supercomputers, driving them forward into a new generation. Our new software-defined hardware architecture
Diploma / Bachelor Degree Electronics with 2 years of design experience in PCB design is must. PCB design expertise, using schematic as Concept HDL and Allegro 16.6 or 17.2, Altium Ability to design PCBs from schematic
Senior Test Engineer Coimbatore, India Location: Coimbatore, Tamil Nadu, India Work Mode: On-site Experience: 3 7 Years Functional Area: Semiconductor Test Engineering / Product Engineering / ATE Role Overview We are looking for a Senior Test