Company:Qualcomm India Private Limited Job Area:Engineering Group, Engineering Group Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of whats possible to enable next-generation experiences and drives digital transformation to help create
Job Responsibilities: Validation Planning & Strategy Define validation plans for MCU/MPU subsystems (CPU, memory, peripherals, interconnects). Develop test cases and coverage metrics based on architecture and design specs. Identify corner cases, stress scenarios, and system-level use cases.
Job Responsibilities: Validation Planning & Strategy Define validation plans for MCU/MPU subsystems (CPU, memory, peripherals, interconnects). Develop test cases and coverage metrics based on architecture and design specs. Identify corner cases, stress scenarios, and system-level use cases.
Job Qualification: Bachelor’s or Master’s degree in Electrical/Electronics/Computer Engineering (or related). 12+ years of experience in semiconductor validation (analog), product engineering, or silicon debug. Strong hands-on background in: MCU architectures Embedded systems Lab bring-up and silicon debug tools
About Affinity Affinity is pioneering new frontiers in AdTech: developing solutions that push past today’s limits and open up new opportunities. We are a global AdTech company helping publishers discover better ways to monetize and enabling
General Information Job Title Staff Software Engineer, Meshing R&D ( C++, Meshing, GenAI, LLM) Job ID 18289 Country India City Pune Date Posted 28-Jul-2026 Job Category Engineering Job Subcategory R&D Engineering Hire Type Employee Remote Eligible
What Youll Do We are seeking a talented and expert Physical Design Engineer to join our team as a hands-on implementation engineer for Cisco’s silicon photonics driver integrated circuits, supporting the next generation of 100G, 200G,
Essential Functions: Strong knowledge on Performance testing tools preferably Jmeter. Proficient in Understanding application architecture, Designing, Planning, Load modelling, Infrastructure estimation. Responsible for ensuring non-functional requirements for performance (such as throughput, latency, memory, CPU, Disk usage etc.)
We are looking for a Backend Engineer to design, build, and own real-time Fraud Risk Management (FRM) systems that evaluate every transaction for fraud and AML risks under strict sub-50ms latency SLAs. The role requires strong