Summary The Lead PERC Rule Developer will drive PERC methodology, rule development, and flow enablement for ESD, latch-up, power-domain, connectivity, and reliability-related verification. The role requires strong hands-on expertise in Calibre LVS/PERC, CMOS and FinFET fundamentals, analog/mixed-signal
General Information Job Title Sr. Staff Engineer-High Speed Interface Pre-Silicon Validation/Verification Job ID 13113 Country India City Noida Date Posted 29-Oct-2025 Job Category Engineering Job Subcategory ASIC Digital Design Hire Type Employee Remote Eligible No Descriptions
Art Director – eLearning & Media Innovation Location: Onsite - Pune or Noida, India Position type: Full-time employee Were looking for a bold, visionary Art Director to lead creative direction across digital learning, media, and next-gen
Role Overview We are looking for a skilled E-Learning Developer responsible for building and developing digital learning courses using Articulate Storyline 360 and Rise 360. The role will work closely with Instructional Designers and Learning Experience Designers
Job Overview Job Title: Sr. ID / ID Employment Type: Contractual (5 Months) Work Location: Remote (Anywhere) Number of Openings: 5 Department: Instructional Design Group Reporting To: Project Manager / ID Competency Head Total Experience: 4–10+