Company:Qualcomm India Private Limited Job Area:Engineering Group, Engineering Group Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of whats possible to enable next-generation experiences and drives digital transformation to help create
OUR STORY At STMicroelectronics, we believe in the power of technology to drive innovation and make a positive impact on people, businesses, and society. As a global semiconductor company, our advanced technologies and chips form the
Position: ASIC RTL Design Engineer Experience: 8+ Years Location: Noida Share resume on [email protected] Key Responsibilities Develop synthesizable RTL from micro-architecture specifications. Design digital blocks such as control logic, datapath, and bus interfaces (AXI/AHB/APB). Debug and validate RTL using
OUR STORY At STMicroelectronics, we believe in the power of technology to drive innovation and make a positive impact on people, businesses, and society. As a global semiconductor company, our advanced technologies and chips form the
Experience : 4+ years Location: Chennai, Bangalore, Noida, Hyderabad, Cochin Responsibilities: Develop RTL code for complex digital circuits using Hardware Description Languages (HDLs) such as Verilog or VHDL Perform functional verification using simulation and formal methods Participate
About Us We are a dynamic team of young engineers, domain experts, and seasoned sales professionals dedicated to providing comprehensive turnkey solutions for complex challenges in Signal Processing. Our expertise spans the cutting-edge technologies in Signal
Position: ASIC RTL Design Engineer Experience: 8 Years Location: Noida Share resume on Key Responsibilities Develop synthesizable RTL from micro-architecture specifications. Design digital blocks such as control logic, datapath, and bus interfaces (AXI/AHB/APB). Debug and validate RTL using simulation
Position: ASIC RTL Design Engineer Experience: 8+ Years Location: Noida Share resume on medha.gaur@ Key Responsibilities - Develop synthesizable RTL from micro-architecture specifications. - Design digital blocks such as control logic, datapath, and bus interfaces (AXI/AHB/APB). - Debug
What you‘ll do: Develop, test, maintain, and improve design IPs for optimal Power, Performance, and Area (PPA). Implement functionality in SystemC/C++ and ensure designs meet stringent Latency, Throughput, Area, and Power goals. Perform comprehensive power, area,
We Are Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely
Define the DFT Architecture for the next generation SoCs. Implementation & verification including Scan, PMBIST, JTAG and other DFT s related logic. Define and develop methodology for DFT insertion, pattern development, manufacturing tests, verifications, etc Working
Applications Engineer position offers a wonderful opportunity to work on most challenging technical problems in verification domain and innovative technologies under Synopsys Verification Platform. Looking for an experienced and motivated professional who enjoys problem solving, open
Responsibilities: Define and realize digital functions on IPs, subsystem or IC level based on required specifications Perform design, verification and evaluation of digital functions Develop RTL using Verilog/SystemVerilog Support verification activities, including developing simple testbenches and debugging