Responsibilities: Support the design and development of high-accuracy analog and mixed-signal ICs, delivering robust, high-quality designs that meet defined specifications and timelines (55%). Take ownership of critical chip subsystems and act as domain expert (20%). Collaborate
Job Title : DGM PEX - (Tech) JD: Drive continuous improvement through training, coordination and implementation of principles of Lean/Six Sigma in day-to-day operations Lead hands-on application of Lean tools to eliminate waste and execute high-impact process
Role: Sr Staff Engineer - Analog IC Location : Hyderabad, India Job Summary: The Sr Staff Analog Design Engineer is responsible for leading the design and development of high accuracy analog and mixed-signal ICs from concept
Senior Analog Layout Engineer Location: Hyderabad, Bangalore Experience: 4 to 6 Years Notice Period: Immediate Job Description: Key Responsibilities Custom Layout Design: Lead the layout development of critical analog blocks, including high-speed ADCs/DACs, PLLs, Ser Des,
Senior Memory Layout Engineer Location: Hyderabad, India Experience: 5–10 Years Role Overview: We are looking for experienced Senior Memory Layout Engineers with strong hands-on expertise in custom layout and physical implementation of memory circuits. The role
Senior Analog Layout Engineer Location: Hyderabad Experience: 4–8 Years Role Overview We are looking for a Senior Analog Layout Engineer with strong hands-on experience in custom/analog IC layout. The ideal candidate will be responsible for delivering
Senior Analog Layout Engineer Location: Hyderabad Experience: 4–10 Years Role Overview We are looking for a Senior Analog Layout Engineer with strong hands-on experience in advanced-node custom/analog layout , particularly 2nm, 3nm, and 5nm FinFET technologies