RTL Design Engineer (SDC Constraints) ๐๐ ๐ฝ๐ฒ๐ฟ๐ถ๐ฒ๐ป๐ฐ๐ฒ: ๐ณ+ ๐ฌ๐ฒ๐ฎ๐ฟ๐ ๐๐ผ๐ฐ๐ฎ๐๐ถ๐ผ๐ป: ๐๐ฎ๐ป๐ด๐ฎ๐น๐ผ๐ฟ๐ฒ ๐ช๐ผ๐ฟ๐ธ ๐ ๐ผ๐ฑ๐ฒ: ๐๐๐ฏ๐ฟ๐ถ๐ฑ / ๐ฅ๐ฒ๐บ๐ผ๐๐ฒ ๐๐ผ๐ฏ ๐ข๐๐ฒ๐ฟ๐๐ถ๐ฒ๐ We are looking for a highly skilled Senior RTL ASIC Design Engineer with strong hands-on experience in SDC Constraints. The ideal
The Opportunity Were not looking for a test manager. Were looking for a quality engineer who leadsโsomeone who treats testing as a data science problem, not a checklist. Youll own quality across a modern .NET/Angular/SQL SaaS running
Hands on experience with Implementation (PnR & Signoff) of multimillion gate SoC designs in cutting edge process technologies (40nm, 28nm, 16nm, 10nm) Lead all aspects of SoC Physical Design with strong expertise in the area of