Position Overview We are looking for an FPGA / RTL Engineer to own the digital baseband and DSP implementation on our custom SDR hardware for satellite payloads. You will take algorithmic specifications for physical layer and
We’re Hiring: FPGA Design Engineer (5–10 Years Experience) Location: Hyderabad Employment Type: C2H Role Are you passionate about FPGA development, high-speed protocols, and hardware validation? Join our dynamic engineering team and work on cutting-edge FPGA solutions
Job Title: FPGA Design & Validation Engineer Location: Hyderabad Experience: 5+ Years Role Overview: We are seeking a skilled FPGA Design & Validation Engineer with strong hands-on experience in FPGA development and board-level validation. The role
We’re Hiring: FPGA RTL Design Engineers | ORAN Domain | Pre-Silicon Experience Priority Hiring | Immediate Joiners Preferred Role: FPGA RTL Design Engineer Location: Pan India Experience: 7 – 15 Years (FTE) Mandatory: Minimum 5 Years
About the Company We HCL TECH are looking for professional who have experience in. About the Role Experience working with Synopsys HAPS (HighPerformance ASIC Prototyping System). Responsibilities Proficient in logical partitioning of large designs for FPGA
RTL FPGA Design Engineers Experience : 1-3 years Location : Hyderabad Expertise RTL Coding in Verilog, System Verilog or VHDL · Strong understanding of FPGA flow, Logic design, Digital design etc. · Knowledge in Xilinx FPGA
Role Overview and Responsibilities: Dhruva Space is seeking an experienced FPGA Engineer to design, develop, and optimize FPGA-based signal processing solutions. This role involves real-time debugging, simulation, and collaboration with cross-functional teams to ensure seamless hardware-software
Minimum qualifications: Bachelors degree in Electrical Engineering or equivalent practical experience. 4 years of experience in Verification, verifying digital logic at RTL level using SystemVerilog or Specman/E for Field Programmable Gate Arrays (FPGAs) or ASICs. Experience in verification and debug
Minimum qualifications: Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 4 years of experience with digital logic design principles, RTL design concepts, and languages, such as Verilog or
Are you looking for a unique opportunity to be a part of something great? Want to join a 17,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of
Minimum qualifications: Bachelors degree in Electrical Engineering or equivalent practical experience. 4 years of experience in Verification, verifying digital logic at RTL level using SystemVerilog or Specman/E for Field Programmable Gate Arrays (FPGAs) or ASICs. Experience in verification and debug
Are you looking for a unique opportunity to be a part of something great Want to join a 17,000-member team that works on the technology that powers the world around us Looking for an atmosphere of
Minimum qualifications: Bachelors degree in Electrical Engineering or equivalent practical experience. 4 years of experience in Verification, verifying digital logic at RTL level using SystemVerilog or Specman/E for Field Programmable Gate Arrays (FPGAs) or ASICs. Experience in verification and debug
Minimum qualifications: Bachelors degree in Electrical Engineering or equivalent practical experience. 8 years of experience in Verification, verifying digital logic at RTL level using SystemVerilog or Specman/E for Field Programmable Gate Arrays (FPGAs) or ASICs. Experience in verification and debug
Minimum qualifications: Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 4 years of experience with digital logic design principles, RTL design concepts, and languages, such as Verilog or
Responsibilities Define microarchitecture details such as interface protocol, block diagram, data flow, pipelines, etc. Perform RTL development (SystemVerilog), debug functional/performance simulations. Perform Register-Transfer Level (RTL) quality checks including Lint, Clock Domain Crossing (CDC), Synthesis, Unified Power
Solid understanding of computer architecture and digital systems RTL code for IP, sub-systems, and SoCs. Proficiency in hardware description languages (HDLs) such as Verilog or system Verilog Experience in building emulation model builds from scratch for SoC
Are you looking for a unique opportunity to be a part of something great Want to join a 17,000-member team that works on the technology that powers the world around us Looking for an atmosphere of
Are you looking for a unique opportunity to be a part of something great Want to join a 17,000-member team that works on the technology that powers the world around us Looking for an atmosphere of
Are you looking for a unique opportunity to be a part of something great Want to join a 17,000-member team that works on the technology that powers the world around us Looking for an atmosphere of