Job Title: Stent Design Engineer Location: Vapi, Gujarat Department: R&D Experience: 3–8 Years Education: B. E./B. Tech / M. E./M. Tech (Mechanical / Biomedical / Materials Science) Role Overview We are looking for a highly skilled
Principal Gen AI based SoC Design Verification Methodology Engineer We are a US based Stealth mode Start-up location: Bangalore / Remote ( any where in India ) We unify the processes used in Semiconductor and Hardware
Job Overview We are looking to hire a strong DV engineer to work on verification of LPDDR5/DDR based IPs and Subsystems in the Infra IP team Create DV infrastructure for verification Integrate VIPs Create and execute test plans,
Senior Gen AI based SoC Design Verification Methodology Engineer We are a US based Stealth mode Start-up location: Bangalore / Remote ( any where in India ) We unify the processes used in Semiconductor and Hardware