At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. 1. Role Overview & Objective We are looking for a motivated SRAM Circuit Design Engineer to
General Information Job Title Staff R&D Software Engineer - DFT Job ID 18371 Country India City Noida Date Posted 12-Aug-2026 Job Category Engineering Job Subcategory R&D Engineering Hire Type Employee Remote Eligible No Descriptions & Requirements
TeamViewer provides a leading Digital Workplace platform that connects people with technology—enabling, improving and automating digital processes to make work work better. Our software solutions harness the power of AI and shape the future of digitalization.
An experienced Digital Design Engineer is responsible for designing, developing, and optimizing digital logic circuits and systems for semiconductor, FPGA, or ASIC-based products. The role involves working across the full design cycle—from specification and RTL design
We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip
Company:Qualcomm India Private Limited Job Area:Engineering Group, Engineering Group Hardware Engineering General Summary: Drive the Physical Design lifecycle of chip development with a strong focus on Floorplanning, Placement, Clock Tree Synthesis (CTS), Routing, and Physical Signoff.
General Information Job Title SOC Engineering- RTL Design- Principal Engineer Job ID 18085 Country India City Noida Date Posted 30-Jun-2026 Job Category Engineering Job Subcategory SOC Engineering Hire Type Employee Remote Eligible No Descriptions & Requirements
Job Summary We are looking for a skilled Physical Design Engineer to support end-to-end ASIC/SoC implementation from netlist/RTL to GDSII. The engineer will be responsible for physical implementation, timing closure, PPA optimization, physical verification, and sign-off
Amity University is a highly research-oriented, Innovation-driven and Inter-disciplinary University accredited by the NAAC with grade A+ and ranked #22 by NIRF. It has over 35,000 students at its campus in Noida (Delhi NCR). The University
Experience : 3 to 8 years Location : Hyderabad/Noida Role and Responsibilities: Responsible for Memory Compiler layout development and verification.· Responsible for Layout design and development of Memory blocks such as Array, Row/ Column decoder, sense amplifier,
Amity University is a highly research-oriented, Innovation-driven and Inter-disciplinary University accredited by the NAAC with grade A+ and ranked #22 by NIRF. It has over 35,000 students at its campus in Noida (Delhi NCR) . The