General Information Job Title Staff R&D Software Engineer - DFT Job ID 18371 Country India City Noida Date Posted 12-Aug-2026 Job Category Engineering Job Subcategory R&D Engineering Hire Type Employee Remote Eligible No Descriptions & Requirements
An experienced Digital Design Engineer is responsible for designing, developing, and optimizing digital logic circuits and systems for semiconductor, FPGA, or ASIC-based products. The role involves working across the full design cycle—from specification and RTL design
Company:Qualcomm India Private Limited Job Area:Engineering Group, Engineering Group Hardware Engineering General Summary: Drive the Physical Design lifecycle of chip development with a strong focus on Floorplanning, Placement, Clock Tree Synthesis (CTS), Routing, and Physical Signoff.
The role Most companies that say they build AI are wiring API calls to somebody elses model. We do that too, where it makes sense. But the interesting problems at Innovaccer are the ones a general-purpose
We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip
Job ID 522236 Posted since 11-Sep-2026 Organization Digital Industries Field of work Research & Development Company SIEMENS EDA (INDIA) PRIVATE LIMITED Experience level Early Professional Job type Full-time Work mode Office/Site only Employment type Permanent Location(s)
Job Summary We are looking for a skilled Physical Design Engineer to support end-to-end ASIC/SoC implementation from netlist/RTL to GDSII. The engineer will be responsible for physical implementation, timing closure, PPA optimization, physical verification, and sign-off while
Location: Noida, Bangalore & Hyderabad Experience: 2-8 years Availability: Immediate Joiners Only Job Description We are seeking a strong Digital Physical Design Engineer to drive block-level physical implementation of complex SoCs/ASICs across advanced nodes. The role
AI Compiler Engineer-Staff/Principal Locations: Bangalore (Hybrid) /Remote The 10 Hottest Semiconductor Startups Of 2025 (So Far) Responsibilities Architect, design, and implement optimizations for AI model execution on graph compilers to improve performance, reduce latency, and maximize hardware utilization. Work
AI Compiler Engineer-Staff/Principal Locations: Bangalore (Hybrid) /Remote The 10 Hottest Semiconductor Startups Of 2025 (So Far) About EnCharge AI: AI Compiler Engineer EnCharge AI is a leader in advanced AI hardware and software systems for edge-to-cloud computing. EnCharge’s
AI Compiler Engineer-Engineer Locations: Bangalore (Hybrid) /Remote The 10 Hottest Semiconductor Startups Of 2025 (So Far) About EnCharge AI: AI Compiler Engineer EnCharge AI is a leader in advanced AI hardware and software systems for edge-to-cloud computing. EnCharge’s
The role Most companies that say they build AI are wiring API calls to somebody elses model. We do that too, where it makes sense. But the interesting problems at Innovaccer are the ones a general-purpose